Reduction of harmonic distortion in electromagnetic torque of a single-phase reluctance motor using a multilevel neutral-point-clamped DC-AC converter

1.   Introduction

In response to the growing demand for enhanced efficiency in industrial electric motor drive systems, the implementation of systems based on solid-state components is becoming increasingly prevalent. Despite their advantages, these systems introduce nonsinusoidal voltage and current waveforms at their output terminals, which contain numerous harmonic components. These harmonics degrade the motor's performance and subsequently affect the coupled mechanical load, leading to issues such as electromagnetic interference, audible noise, and vibrations ^[1]. Specifically, in AC machines, the generation of noise is closely related to the radial forces, which are directly proportional to the air-gap flux density. Thus, by mitigating the magnitude of this density, noise can be reduced. Additionally, rotors with low skew angles tend to generate higher levels of noise and vibrations ^{[2,3,4,5,6,7,8,9,10,11,12,13,14,15]}. Notably, while high-frequency operation of drive systems may reduce acoustic noise, it could simultaneously induce mechanical resonances within the system ^[15,16].

The harmonic content in the output currents of solid-state drives produces nonsinusoidal magnetomotive force (mmf) waveforms, which, in turn, result in electromagnetic torque containing additional harmonics ^[1]. These harmonics within the electromagnetic torque can be classified into two distinct categories: stationary harmonic torques and pulsating harmonic torques ^[1]. Stationary harmonics arise from the interaction between harmonics of the rotor's mmf and harmonics of the same order in the air-gap flux ^[1,17]. On the other hand, pulsating harmonic torques are induced by the interaction of the rotor's mmf harmonics with those of different orders in the rotating air-gap flux harmonics ^[1,17]. It is noteworthy that lower-order pulsating torques can be mitigated by employing drive systems with pulsewidth modulation switching strategies ^{[18,19,20,21]}. Furthermore, in AC motors operating at low speeds, drives utilizing high-frequency switching can achieve electromagnetic torque with minimal harmonic contamination ^[19,20,21].

Considering the advantages of multilevel converters, they are promising candidates for driving AC motors due to their ability to reduce harmonic distortion in output voltages and currents. However, this benefit comes at the cost of increased complexity in the control system, requiring more switching devices and sophisticated modulation techniques ^[22,23].

One type of AC motor, the single-phase reluctance motor (SPRM), operates on the principle of reluctance rather than induction. Unlike induction motors, which rely on slip to generate rotor flux, SPRMs operate synchronously and require a dedicated drive system for starting. The simplicity of SPRMs' construction, combined with their low cost, makes them suitable for a wide range of applications, from domestic appliances such as washing machines to large industrial pumps ^[17]. Despite their widespread use, the issue of harmonic distortion in the electromagnetic torque (T_e(t)) of SPRMs remains relatively underexplored. For instance, in ^[24], a nonlinear analytical model of an SPRM is presented, accounting for magnetic saturation and slotting effects. Meanwhile, in ^[25], an SPRM operating directly online, without the need for an external driver, is proposed as a candidate for pumping applications. Nonetheless, none of these studies addressed the impact of harmonic distortion on the SPRM's electromagnetic torque, which can significantly degrade the motor's performance.

This study presents a comprehensive harmonic and thermal evaluation of SPRM drives powered by single-phase neutral-point-clamped (NPC) multilevel DC–AC converters. Three topologies—a two-level single-phase NPC converter (2L-1P-NPC), a three-level single-phase NPC converter (3L-1P-NPC), and a four-level single-phase NPC converter (4L-1P-NPC)—are examined under four pulsewidth modulation (PWM) strategies: bipolar voltage PWM (BVPWM), unipolar voltage PWM (UVPWM), level-shifted PWM (LSPWM), and virtual-vector PWM (VVPWM), all operating at a constant 10 kHz switching frequency. Simulations in the MATLAB-Simulink environment provide high-fidelity modeling of the electromechanical dynamics, enabling accurate THD characterization in both the voltage and torque profiles.

Beyond harmonic performance, this study incorporates a comprehensive thermal analysis, evaluating switching losses (P_sw), conduction losses (P_cond), core losses (P_core), and copper losses (P_copper). Higher-level converters reduce voltage stress per switch but increase cumulative conduction losses, elevating junction temperatures (T_j) from 121.8℃ in the 2L-1P-NPC converter to 188℃ in the 4L-1P-NPC converter, necessitating advanced cooling strategies. While multilevel converters enhance harmonic performance, effective thermal management is crucial for maintaining the system reliability.

This work is entirely theoretical, employing MATLAB-Simulink simulations for rigorous system assessment, with experimental validation planned for future work. These findings establish a foundation for optimizing power conversion systems, balancing power quality, efficiency, and thermal performance in high-performance SPRM drives.

The article is organized as follows: Section 2 defines the converter topologies, while Section 3 models the SPRM and converters. Section 4 details the modulation strategies, and Section 5 analyzes the thermal performance. Section 6 outlines PI-based control, Section 7 presents the simulation results, and Section 8 concludes with the key findings and future directions.

2.   The system's topology

This study analyzes three distinct topologies, all of which utilize the same SPRM, while varying the level of the single-phase DC–AC NPC converter (1P-NPC) from two to four levels. Specifically, Topologies A, B, and C correspond to the configurations where the SPRM is driven by a 1P-NPC with two, three, and four levels, respectively. Figure 1 illustrates the switching models of the 1P-NPC converters, along with the electrical circuit of the SPRM for each topology under investigation.

As shown in Figure 1, the SPRM is modeled as an electromechanical system ^[17,26], with its electrical circuit characterized by the stator's winding resistance (R_a) and inductance (L_a(θ_m(t))), where the inductance is a function of the rotor's angular position (θ_m(t)). The terminal voltage (v_a(t)), stator current (i_a(t)), and developed electromagnetic torque (T_e(t)) are key variables of the electrical side. On the mechanical side, which remains identical across all topologies, the system is represented by a rotating load modeled via its electrical analog ^[27]. This mechanical load is defined by its moment of inertia (J_L), along with its damping (b_L) and stiffness coefficients (k_L). Additionally, the mechanical torque (T_L(t)) developed by the load and the angular position (θ_L(t)) of the load complete the description of the mechanical subsystem.

Each of the topologies, as depicted in Figure 1, uses a full-bridge configuration of the 1P-NPC converter, which consists of two legs, denoted as Leg 1 and Leg 2. The switching behavior of the converters is governed by switching functions (SFs), denoted as s_ij, where i ∈ {d_c1, d_c2, d_c3, d_c4} and j ∈ {a_c1, a_c2}.

Figure 1(a) presents Topology A, where the SPRM is driven by a 2L-1P-NPC converter. The DC side of this topology is characterized by a single DC voltage source (v_dc(t) ≈ V_dc) and two corresponding DC currents (i_dc1(t) and i_dc2(t)).

In Figure 1(b), Topology B is illustrated, showing the SPRM driven by a 3L-1P-NPC converter. In this configuration, the DC side is composed of two equal DC voltage sources, each having a magnitude of V_dc/2, and the three DC currents (i_dcy(t), where y ∈ {1, 2, 3}) are specified accordingly.

Finally, Figure 1(c) illustrates Topology C, which features a 4L-1P-NPC converter driving the SPRM. In this topology, the DC side is supplied by three equal DC voltage sources, each having a magnitude of V_dc/3, and the four DC currents (i_dcy(t), where y ∈ {1, 2, 3, 4}) are highlighted as part of the system's configuration.

3.   Modeling the system

In this subsection, the mathematical models for the SPRM and the 1P-NPC converter are developed.

3.1.   SPRM modeling

Referring to Figure 1, by applying Kirchhoff's voltage law to the SPRM, its dynamic equation is derived as follows:

where λ_a(t, θ_m(t)) represents the concatenated magnetic flux, which is a function of both the time t and the rotor's angular position θ_m(t). Additionally, it is known that L_a(t) = λ_a(t, θ_m(t))/i_a(t) ^[17], and by substituting this into (1) and performing algebraic manipulations, the dynamic equation of the electromechanical system is obtained, as shown as follows ^[17,26]:

Here, ω_m(t) = dθ_m(t)/dt denotes the angular velocity of the SPRM. By multiplying both sides of (2) by i_a(t), the instantaneous electric power (p_e(t)) of the SPRM is obtained, as expressed in:

The magnetic energy stored in the inductance L_a(θ_m(t)) is given by w_g(t) = 0.5⋅L_a(θ_m(t))⋅i_a(t)². Hence, the instantaneous rate of change of magnetic energy is given by:

According to Figure 1, the power balance of the electromechanical system can be expressed as p_e(t) = p_m(t) + p_R(t) + dw_g(t)/dt, where p_R(t) = R_a⋅i_a²(t) is the power dissipated by the resistance R_a, and p_m(t) represents the instantaneous power developed by the mechanical load. Consequently, from the power balance equation, the mechanical power p_m(t) is defined by:

As it is known, p_m(t) = T_e(t)⋅ω_m(t), where T_e(t) is the electromagnetic torque developed by the SPRM, expressed as follows ^[17,26]:

According to ^[17] and the application of the two-reaction theory ^[28], the inductance L_a(θ_m(t)) is defined as follows:

where L_ad and L_aq represent the inductance along the direct and quadrature axes of the magnetomotive distribution in the SPRM, respectively ^[17,26,28]. Substituting (7) into (2) and (6) yields the dynamic model of the SPRM, which is given by:

3.2.   Modeling mechanical load

The mechanical load, as depicted in Figure 1, is represented by a mechanical network, with its dynamic equation defined as shown in ^[27]:

Here, T_L(t) is the developed torque, J_L is the moment of inertia, b_L is the damping coefficient, and k_L is the stiffness coefficient of the mechanical load. Assuming a lossless system with no coupling losses between the SPRM rotor and the mechanical load, it follows that T_e(t) = T_L(t).

3.3.   Modeling the nL-1P-NPC converter

Referring to Figure 1 and according to ^[29], the SFs for the nL−1P−NPC converter (where n ∈ {1, 2, 3, 4}) are defined by:

According to (10), the SFs for each leg of the nL−1P−NPC converter cannot simultaneously take the value of one, meaning that both switches in a given leg cannot be closed at the same time. Furthermore, the operation of the switches is restricted such that only one switch can be closed at any given moment ^[30,31].

In the specific case of the 2L-1P-NPC converter, depicted in Figure 1(a), the voltage v_a(t) and the currents i_dc1(t) and i_dc2(t) are defined as follows in (11) and (12), respectively ^[29].

For the multilevel converters (nL−1P−NPC), the generalized switching model at n levels is expressed as follows in (13) and (14).

The switching models for the systems in Topologies B and C are described by (8)−(10), (13), and (14).

4.   Modulation

This research introduces four candidate modulation strategies for implementation in the nL-1P-NPC topologies, as illustrated in Configurations A–C. For the 2L-1P-NPC converter (Topology A), two modulation techniques are applied: BVPWM and UVPWM. In contrast, for multilevel converters (zL-1P-NPC where z ∈ {3, 4}), VVPWM and LSPWM are used. The following subsections provide a detailed description of each modulation method.

4.1.   BVPWM analysis

BVPWM, as part of the standard modulation techniques, has been extensively analyzed, with several contributions available in the literature ^{[29,32,33,34]}. The SFs of the 2L-1P-NPC converter, denoted as s_xy(t), where {x, y} ∈ {1, 2}, are generated by comparing a high-frequency triangular carrier waveform (v_c(t)) with a line-frequency sinusoidal control waveform (v_m(t)) ^[29]. For the application of BVPWM to the 2L-1P-NPC topology (Figure 1(a)), the v_m(t) and v_c(t) waveforms are mathematically defined by:

Here, m, f, and T_s represent the modulation index, line frequency, and switching period, respectively. The SFs (s₂₂(t), s₁₁(t)) and (s₂₁(t), s₁₂(t)) form two paired combinations. The SFs in each pair toggle between zero and one, ensuring that one SF in the pair always holds a value of one ^[29]. Specifically, when v_m(t) > v_c(t), the SFs s₂₂(t) and s₁₁(t) take the value of one; otherwise, s₂₁(t) and s₁₂(t) are set to one. Figure 2(a) demonstrates the implementation of BVPWM for the 2L-1P-NPC topology, showing the duty ratios (d₂₁(t) and d₂₂(t)) of Legs 1 and 2, along with the synthesized output voltage v_a(t). This implementation employs BVPWM under the conditions m = 0.8, f_s = 10 kHz, and V_dc = 800 V.

4.2.   UVPWM analysis

Similar to BVPWM, UVPWM has been comprehensively examined in previous studies ^{[29,32,33,34]}. The SFs introduced in the BVPWM analysis are now derived by comparing the triangular waveform v_c(t) (from (16)) with two sinusoidal control signals shifted by 180°: v_m1(t) and v_m2(t). These signals are defined as follows:

In this modulation scheme, the comparison between v_m1(t) and v_c(t) governs the switching of SFs for Leg 1, while the comparison between v_m2(t) and v_c(t) controls the SFs for Leg 2 ^[29]. As in BVPWM, when v_m1(t) > v_c(t), the SFs s₂₁(t) and s₁₁(t) take the values one and zero, respectively, and vice versa. Similarly, if v_m2(t) > v_c(t), the SFs s₂₂(t) and s₁₂₍t) take the values one and zero.

Figure 2(b) depicts the UVPWM implementation in the 2L-1P-NPC converter, including the duty ratios (d₂₁(t) and d₂₂(t)) of Legs 1 and 2, and the synthesized output voltage v_a(t). The implementation is shown for m = 0.8, f_s = 10 kHz, and V_dc = 800 V.

For multilevel converters (zL-1P-NPC, z ∈ {3, 4}), two candidate modulations are presented: VVPWM and (n−1)-LSPWM. These strategies are described in the following sections, followed by an analysis of their performance in Topologies B and C.

4.3.   VVPWM analysis

VVPWM relies on building a special set of space vectors, termed virtual vectors, within the space vector diagram. These vectors are defined as a linear combination of specific switching states ^[35,36], and each virtual vector ensures a zero average neutral-point current over every switching cycle T_s. Thus, synthesizing the reference voltage vector with these virtual vectors maintains balance in the DC-link capacitor voltages in each cycle ^{[35,36,37,38]}. This modulation strategy can be generalized for n-level and p-leg converters by using the expressions described below, as introduced in ^[38].

The modulation waveforms d_x(θ(t)) for each converter leg are given by (18), where θ(t) = ω⋅t, m is the modulation index, and NF is the normalization factor to maintain m within the [0, 1] linear modulation range ^[38]. Since the converter is configured as a full bridge (two legs), p is set to 2.

The duty ratios for the connection of the AC-side and DC-side rails (denoted as d_{x, y}) are determined using (19), combined with a symmetrical staircase-type distribution over one T_s. Figure 3 illustrates the duty ratio pattern for n = 3, p = 2, and m = 0.80.

4.4.   LSPWM analysis

LSPWM has been thoroughly explored in the literature ^{[39,40,41,42,43]}. This method compares a modulating waveform, typically sinusoidal, with n−1 carrier signals, each corresponding to a voltage level. When the modulating signal exceeds a given carrier, the associated voltage level is generated ^[42]. A potential implementation is depicted in Figure 4(a), and the duty ratio pattern for n = 3 is shown in Figure 4(b). The modulating waveform is defined by v_m(t) = V_m⋅sin(2⋅π⋅f_m∙t), where V_m and f_m are the peak amplitude and frequency (with f_m = 50 Hz).

The following expression:

defines the carriers, where V_carr, ϕ_c, and f_s are the carrier amplitude, phase angle, and switching frequency, respectively ^[43]. Comparisons between the modulating signal and the carriers are defined as follows:

From here, i_α = k + 2, k + 3, …, 2∙k + 1 and i_β = 1, 2, …, k.

5.   Thermal analysis of two-level and multilevel converters for single-phase reluctance motor drives

Thermal performance is a critical factor influencing the efficiency, reliability, and lifespan of power converters. In electric motor drive applications, excessive heat generation in power semiconductor devices, passive components, and interconnection elements can degrade the system's performance and lead to failure mechanisms such as bond wire fatigue, solder joint cracking, and thermal runaway ^[44,45].

Multilevel converters offer a significant advantage over conventional two-level topologies by distributing the voltage stress across multiple switching devices, thereby reducing switching losses and improving harmonic performance. However, the increased number of components in higher-level converters introduces additional conduction losses, making thermal optimization crucial. This section provides a comprehensive analysis of power losses and thermal behavior in 2L-1P-NPC, 3L-1P-NPC, and 4L-1P-NPC converters, evaluating their impact on the system's thermal performance ^[44,45].

5.1.   Power loss estimation in power semiconductors

The total power dissipation in a converter comprises switching losses, conduction losses, and passive component losses. The total power loss (P_total) is given by ^[29]:

where P_sw, P_cond, P_core, and P_copper are the switching losses in power semiconductor devices, the conduction losses in the switches, the magnetic core losses in inductors, and the copper (winding) losses in the inductors and transformer, respectively.

Conduction losses occur when the power semiconductor devices are in the on state. The conduction loss per switch is calculated as follows:

In this context, I_rms and R_on are the rms current through the switch and the on-state resistance of the semiconductor device ^[29].

For multilevel converters, the voltage stress per switch is reduced, leading to lower conduction losses per device. However, the increased number of switches in three- and four-level converters contributes to additional conduction loss ^[22].

Switching losses occur during the transition between the on and off states due to the overlap of voltage and current waveforms. The loss per switch is given by ^[22,29]:

Here, V_dc and I_load are the DC-link voltage and the load current, respectively. Moreover, t_on, t_off, and f_sw are the turn-on and turn-off times and the switching frequency, respectively.

Multilevel converters exhibit lower voltage steps per switching event, significantly reducing P_sw compared with a two-level topology. However, the total number of switching transitions increases, which may counteract this benefit in higher-level converters ^[22].

5.2.   Power losses in passive components

In addition to semiconductor losses, inductors and transformers in converters also contribute to thermal stress through core losses and copper losses ^[44,45].

Core losses in magnetic components arise due to hysteresis and eddy currents. These losses are estimated using Steinmetz's equation ^[46]:

where k is the material-dependent constant, and f_sw, B_max, and V_core are the switching frequency and the maximum flux density, and the core volume, respectively. Finally, α and β are empirical coefficients for the material.

Higher-level converters exhibit lower peak inductor currents, which can reduce core losses by decreasing B_max. However, the increased number of inductors in multilevel topologies may introduce additional thermal constraints ^[22].

On the other hand, copper losses in inductors and transformers are given by:

where R_winding is the winding resistance. Multilevel converters typically reduce I_rms, thereby lowering copper losses.

5.3.   Junction temperature and thermal resistance modeling

The temperature rise in power semiconductors is governed by their thermal resistance network. The junction temperature (T_j) is estimated as ^[47] indicated in:

Here, R_th-jc and T_c are the thermal resistance from the junction to the case and the case temperature, respectively. Also, R_th-jc + R_th-ca is the case-to-ambient resistance.

Higher-level converters typically experience lower switching losses and lower junction temperature, but the total conduction losses increase due to the additional semiconductor devices ^[22].

6.   Control system

The system configurations depicted in Topologies A–C operate as a servomechanism with velocity feedback, where the primary control goal is to regulate the angular velocity of the mechanical load by controlling the angular position of the SPRM, denoted as θ_m(t) ^[48]. Figure 5 illustrates a control scheme applicable to all the topologies under consideration. An open-loop control strategy is employed to regulate v_a(t) using the nL−1P−NPC converter (where n ∈ {2, 3, 4}). In this approach, a constant modulation index m is selected, and the switching states (s_zx(t) ∈ {1, 2, 3, 4} and x ∈ {1, 2}) are determined by the modulator according to the chosen modulation technique, such as VBPWM, UVPWM, VVPWM, or LSPWM.

The closed-loop control of the SPRM is executed via a proportional–integral (PI) linear feedback output compensator. The measured variable, specifically the angular position of the mechanical load θ_L(t), is compared with a reference angular position θ_L^*(t), generating a position error signal θ_L^*(t) − θ_L(t). This error signal is then processed by the PI compensator to produce the controlled variable ω_m(t), which serves as the control input to the SPRM.

The plant model subjected to control is derived from the linearization of the nonlinear models presented in (8) and (9).

To simplify the explanation, the linearization process is omitted, and the resulting linearized state-space model of the system is given by the following:

where ${\mathbf x}\left(t\right) = {\left[{\widehat{i}}_{\mathrm{a}}\left(t\right), {\widehat{\theta }}_{\mathrm{m}}\left(t\right), {\widehat{\theta }}_{\mathrm{L}}\left(t\right), {\widehat{\omega }}_{\mathrm{L}}\left(t\right)\right]}^{\mathrm{T}}$, ${\mathbf u}\left(t\right) = {\left[{\widehat{v}}_{\mathrm{a}}\left(t\right), {\widehat{T}}_{\mathrm{L}}\left(t\right)\right]}^{\mathrm{T}}$, and ${\mathbf y}\left(t\right) = {\left[{\widehat{i}}_{\mathrm{a}}\left(t\right), {\widehat{\theta }}_{\mathrm{m}}\left(t\right), {\widehat{\theta }}_{\mathrm{L}}\left(t\right), {\widehat{\omega }}_{\mathrm{L}}\left(t\right), {\widehat{T}}_{\mathrm{e}}\left(t\right)\right]}^{\mathrm{T}}$ and x(t) ∈ ℝ⁴, u(t) ℝ², and y(t) ∈ ℝ⁵ represent the state, input, and output vectors, respectively. The hatted variables correspond to small-signal variables resulting from the linearization ^[31,48]. The matrices A, B, C, and D represent the state, input, output, and direct transmission matrices, respectively, as defined in (29). The constants K₁−K₆ are set as in (30). Here, the capitalized terms represent the steady-state variables derived from the equilibrium model described in (8) and (9). The steady-state angular velocity is denoted as Ω_m.

The steady-state conditions for the servomechanism are defined by the cancellation of the time derivatives in (8) and (9), leading to the following equilibrium equations, given by:

From these equations, the unknowns I_a and Θ_m are solved and expressed as follows:

Finally, by applying the Laplace transform to the linear state-space model in (28), with zero initial conditions, the transfer functions of the system are derived by:

where Y(s) ∈ {₵}⁵, U(s) ∈ {₵}², and I is the identity matrix of 4 x 4 size.

On the basis of this model, the PI controller for the control system is designed, as illustrated in Figure 5.

7.   Simulation results

The switching models for the converter Topologies A, B, and C were meticulously simulated within the MATLAB-Simulink environment to rigorously analyze the system's performance across diverse operational scenarios. Table 1 details the specific simulation parameters used, including the inductance, resistance, and mechanical properties of the load, ensuring an accurate representation of real-world operating conditions.

All converters—namely, the nL-1P-NPC converters, with n ∈ {2, 3, 4}—were set to function at a constant switching frequency of f_s = 10 kHz. The initial mechanical load parameters were established with an angular position θ_L0 = 0 deg and an angular velocity ω_L0 = 0 rad/s. The SPRM was operated at a frequency f = 50 Hz, with a reference angular position θ_L^*(t) = 30 deg. These reference values were selected to represent an intermediate operating condition that closely reflects industrial applications such as pumps and fans, thereby enabling the generalization of results for real-world performance.

The simulation covered four distinct operating scenarios for each topology. In Scenarios 1 and 2, the 2L-1P-NPC converters utilized the BVPWM and UVPWM modulation schemes, respectively. In Scenarios 3 and 4, the 3L-1P-NPC and 4L-1P-NPC converters operated using the LSPWM and VVPWM modulation techniques.

Figure 6(a, b) exhibit the steady-state responses for the SPRM variables v_a(t), i_a(t), and T_e(t); the 2L-1P-NPC converter states i_dc2(t); and the duty cycles d₁₁(t) and d₂₁(t) for Leg 1, along with the mechanical load dynamics ω_L(t), all corresponding to Scenarios 1 and 2 of Topology A (Figure 1(a)). The analysis confirms that the voltage waveform v_a(t) closely corresponds to the modulation scheme applied. Under Scenario 1 with BVPWM, v_a(t) transitions between ±V_dc, while i_dc2(t) contains a pronounced 100 Hz sinusoidal component, aligning with twice the SPRM's fundamental operating frequency, as supported by ^[29]. Conversely, under UVPWM (Scenario 2), v_a(t) oscillates between 0 and ±V_dc, and the current i_dc2(t) exhibits a "shark-tail" profile with significantly reduced ripple, confirming observations from ^[29]. Furthermore, the duty cycles d₁₁(t) and d₂₁(t) consistently maintain a 180° phase shift across both scenarios, a characteristic intrinsic to UVPWM modulation. Figures 7(a), 8(a), 7(b), and 8(b) depict the steady-state behavior for Topologies B and C (Figure 1(b) and 1(c)), respectively, in Scenarios 3 and 4. For Topology B, the voltage v_a(t) adopts a stepped waveform typical of three-level converters, presenting levels of 0, ±V_dc/2, and ±V_dc for both LSPWM and VVPWM ^[22]. The duty cycles d₁₁(t), d₂₁(t), and d₃₁(t) maintain their characteristic phase shifts, contributing to more refined voltage synthesis. In Topology C, the four-level converter introduces additional voltage steps, achieving values of 0, ±V_dc/3, ±2⋅V_dc/3, and V_dc. The duty cycle d₂₁(t) demonstrates saturation in Scenario 3 but operates equivalently to d₃₁(t) in Scenario 4 ^[22].

The electromagnetic torque T_e(t), a critical factor for mechanical performance, showed an approximate ripple of 8.8 Nm in Topology A under BVPWM (Figure 6(a)), which was virtually eliminated when UVPWM was employed (Figure 6(b)). In Scenarios 3 and 4, the torque ripple remained negligible, confirming the efficiency of higher-level converters ^[22]. Additionally, the analysis of the duty cycles revealed that the shifts in d₁₁(t), d₂₁(t), d₃₁(t), and d₄₁(t) have a direct impact on the harmonic profile and torque characteristics. The THD analysis presented in Table 2 substantiates the claim that multilevel converters offer superior harmonic performance. Topology A exhibited the highest THD for v_a(t) at 133% under BVPWM, whereas the lowest THD was observed in Topology C with LSPWM, registering at 23.66%.

These findings are in congruence with ^[29], emphasizing that UVPWM effectively reduces THD in two-level NPC converters. As the converter levels increased, the waveform of v_a(t) approached an ideal sinusoidal form, minimizing THD and enhancing the system's overall performance. Regarding T_e(t), THD consistently remained below 2% across all scenarios, with the highest value observed in Scenario 1 of Topology A, corroborating the theoretical expectations ^[23,49]. The significance of the THD reduction lies in its direct impact on the system's performance, specifically, minimizing torque ripple, enhancing operational smoothness, and reducing acoustic noise and mechanical wear.

To further validate the dynamic characteristics of the converter topologies, Figure 9 presents the transient response of the system under step changes in the load's angular position θ_L(t) and angular velocity ω_L(t), considering Topologies A, B, and C for Scenarios 2 and 4. In Figure 9(a), the system is configured as Topology A in Scenario 2, while Figure 9(b, c) illustrates the dynamics for Topologies B and C in Scenario 4. Initially, θ_L^*(t) = 30° and at t = 4 s, the step change increases θ_L^*(t) to 80°, followed by another step change to θ_L^*(t) = 50° at t = 10 s. Across all scenarios, the system exhibits negligible steady-state errors in θ_L(t), and the velocity ω_L(t) responds appropriately to step changes, demonstrating relative stability and minimal overshoot ^[48,50].

To enhance the clarity of the transient performance comparison, the key metrics—rise time, settling time, overshoot, and steady-state error—have been extracted from Figure 9 and summarized in Table 3. As shown, Topology C provides the fastest response with the lowest overshoot and error, followed by Topology B, and finally Topology A. This demonstrates that higher-level converters not only reduce harmonic distortion but also significantly improve the dynamic control behavior, which is essential in high-precision motion applications.

In regard to the thermal analysis associated with each topology, the estimation of the total power dissipated is conducted, as expressed in (22). In order to obtain the variables and constants, and consequently calculate a given operating point, certain values were assumed according to ^[51,52], which are enumerated in Table 4. In order to evaluate the power losses and thermal losses, all the calculation models established in (22)−(27) have been considered. According to the values listed in Table 4, all these losses are calculated according to the topology studied in Table 5; this calculation is summarized in Table 5.

From the results in Table 5, the thermal analysis of the 2L-1P-NPC, 3L-1P-NPC, and 4L-1P-NPC converters reveals critical trade-offs between conduction losses, switching losses, total power dissipation, and thermal performance. As the number of converter levels increases, conduction losses (P_cond) scale linearly due to the greater number of power semiconductor devices, reaching 144 W in the 4L-1P-NPC converter. Although multilevel converters reduce per-device switching stress, the overall switching losses (P_sw) escalate significantly, with the 4L-1P-NPC converter dissipating nearly twice the energy of the 2L-1P-NPC converter. Core and copper losses remain stable, suggesting that the passive component design is less affected by the converter's topology but still requires optimization for efficiency. The total power loss (P_total) rises sharply, resulting in higher junction temperatures (T_j), which peak at 188℃ in the 4L-1P-NPC converter, raising concerns about thermal runaway and long-term reliability. These findings emphasize the necessity of advanced cooling solutions, such as forced-air or liquid cooling, to ensure safe operation in higher-level converters. While multilevel converters improve the harmonic performance and dynamic response, their increased thermal demands necessitate a careful balance between efficiency, power density, and thermal dissipation strategies.

This enhanced simulation framework offers critical insights into the interdependence among modulation schemes, converter topologies, harmonic content, thermal characteristics, and transient control behavior. These results validate the comprehensive effectiveness of multilevel converters in advanced motor drive systems, establishing a strong foundation for subsequent experimental implementation.

8.   Conclusions

This study presented a rigorous simulation-based evaluation of the harmonic, dynamic, and thermal performance of SPRM drives using multilevel NPC DC–AC converters. Three converter topologies—2L-1P-NPC, 3L-1P-NPC, and 4L-1P-NPC—were systematically analyzed under various modulation schemes to assess their impact on THD, electromagnetic torque ripple, transient response, and power loss distribution. High-fidelity simulations incorporating realistic motor and mechanical load parameters demonstrated that increasing the converter level significantly enhances harmonic quality. Notably, the 4L-1P-NPC topology with LSPWM achieved the lowest output voltage THD (23.66%) and electromagnetic torque THD (0.17%), effectively minimizing torque ripple and mitigating deleterious effects such as acoustic noise and mechanical vibrations.

In addition to harmonic improvements, the study reveals that multilevel topologies yield superior dynamic performance. The transient response metrics—rise time, settling time, overshoot, and steady-state error—clearly improve with the converter level, with the 4L-1P-NPC converter exhibiting a 0.24 s rise time and only 0.1° of steady-state error. These enhancements are critical for high-precision motion applications where dynamic response and control stability are essential. Furthermore, a quantitative thermal analysis indicates that higher-level topologies, while beneficial in the harmonic and control domains, impose increased thermal stress due to cumulative conduction and switching losses. For instance, junction temperature rises from 121.8℃ in the 2L topology to 188℃ in the 4L configuration, underscoring the importance of implementing advanced thermal management strategies to ensure long-term reliability.

Overall, this research contributes a comprehensive design and analysis framework that integrates harmonic distortion mitigation, dynamic control validation, and thermal feasibility for SPRM-based drive systems. These findings offer valuable guidance for the development of high-performance, thermally robust, and harmonically optimized converter-driven motor applications. Future work will focus on experimental validation and the development of real-time control platforms to translate these theoretical insights into practical implementations.

Author contributions

José M. Campos-Salazar: Conceptualization, methodology, validation, formal analysis, investigation, writing—original draft, supervision; Roya Rafiezadeh: Methodology, validation, formal analysis, investigation, writing—review and editing; Juan L. Aguayo-Lazcano: Methodology, validation, formal analysis, investigation, writing—review and editing; Constanza Márquez: validation, formal analysis, investigation, writing—review and editing.

Use of Generative AI tools declaration

The authors declare they have not used artificial intelligence (AI) tools in the creation of this article.

Conflict of interest

All authors declare no conflicts of interest in this paper.