In this study, a novel method enabled by estimation of initial value guess at nonequilibrium was proposed to accelerate drift-diffusion equations in semiconductor device simulation. The initial value guess was obtained by solving analytical model about electrical potential with the decoupling algorithm. By obtaining the initial value directly at the target bias voltage, the proposed method eliminated time-consuming bias ramping process in the classical method starting from the equilibrium state, thereby accelerating the whole process. The method has been applied to a junction barrier Schottky (JBS) diode for validation. Numerical results showed that the proposed method achieves convergence within 10 iterations at several reverse bias voltages, achieving significant reduction of iteration number compared to the classical method using the bias ramping process. It demonstrated that the proposed method holds high feasibility to facilitate the semiconductor device property prediction in relatively regular device structure in the case of low current. With further improvements, this method can also be applied to more complex devices.
Citation: Chunlin Du, Yu Zhang, Haolan Qu, Haowen Guo, Xinbo Zou. Acceleration of solving drift-diffusion equations enabled by estimation of initial value at nonequilibrium[J]. Networks and Heterogeneous Media, 2024, 19(1): 456-474. doi: 10.3934/nhm.2024020
In this study, a novel method enabled by estimation of initial value guess at nonequilibrium was proposed to accelerate drift-diffusion equations in semiconductor device simulation. The initial value guess was obtained by solving analytical model about electrical potential with the decoupling algorithm. By obtaining the initial value directly at the target bias voltage, the proposed method eliminated time-consuming bias ramping process in the classical method starting from the equilibrium state, thereby accelerating the whole process. The method has been applied to a junction barrier Schottky (JBS) diode for validation. Numerical results showed that the proposed method achieves convergence within 10 iterations at several reverse bias voltages, achieving significant reduction of iteration number compared to the classical method using the bias ramping process. It demonstrated that the proposed method holds high feasibility to facilitate the semiconductor device property prediction in relatively regular device structure in the case of low current. With further improvements, this method can also be applied to more complex devices.
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