Phase noise optimization of integrated ring voltage-controlled oscillators by metaheuristics

Perla Rubi Castañeda-Aviña; Esteban Tlelo-Cuautle; Luis-Gerardo de la Fraga; Perla Rubi Castañeda-Aviña; Esteban Tlelo-Cuautle; Luis-Gerardo de la Fraga

doi:10.3934/math.2022813

AIMS Mathematics

2022, Volume 7, Issue 8: 14826-14839. doi: 10.3934/math.2022813

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Phase noise optimization of integrated ring voltage-controlled oscillators by metaheuristics

1.
Department of Electronics, Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Luis Enrique Erro No. 1, Tonantzintla, Puebla 72840, Mexico
2.
Computer Science Department, Cinvestav, Av. IPN 2508, Mexico City 07360, Mexico

Received: 13 April 2022 Revised: 23 May 2022 Accepted: 05 June 2022 Published: 09 June 2022
MSC : 26A33, 90C29

Real applications of integrated circuits (ICs) require satisfying strong target specifications, which challenge is focused on trading off specifications that are in conflict, i.e. improving one characteristic can degrade other(s). This is the case of designing a ring voltage-controlled oscillator (VCO) using IC nanometer technology, with the goal to accomplish a wide frequency and voltage-control tuning range, low silicon area, among others. For real ring VCO applications, an open challenge is guaranteeing minimum phase noise, which is in conflict with main dynamical characteristics when maximizing frequency range, voltage-control range, gain, and minimizing silicon area and power consumption. To cope with these design problems, we show the minimization of the phase noise of a ring VCO applying two metaheuristics, namely: Differential evolution (DE) and particle swarm optimization (PSO), which have the ability to handle constraints that are relevant to generate optimal solutions. The results show that both DE and PSO are effective in the optimization of the ring VCO. The comparison of the best phase noise results obtained with DE (-129.01 dBc/Hz @1MHz) and PSO (-124.67 dBc/Hz @1MHz) algorithms, not only show that the DE solution being lower by 4.34 dBc/Hz with respect to the best solution provided by PSO, but also it is quite satisfactory in contrast to similar works. Finally, the optimized ring VCO characteristics are compared herein with several designs considering a figure of merit, gain, frequency and voltage-control ranges.
- ring VCO,
- optimization,
- phase noise,
- differential evolution,
- particle swarm optimization
Citation: Perla Rubi Castañeda-Aviña, Esteban Tlelo-Cuautle, Luis-Gerardo de la Fraga. Phase noise optimization of integrated ring voltage-controlled oscillators by metaheuristics[J]. AIMS Mathematics, 2022, 7(8): 14826-14839. doi: 10.3934/math.2022813

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Abstract

Real applications of integrated circuits (ICs) require satisfying strong target specifications, which challenge is focused on trading off specifications that are in conflict, i.e. improving one characteristic can degrade other(s). This is the case of designing a ring voltage-controlled oscillator (VCO) using IC nanometer technology, with the goal to accomplish a wide frequency and voltage-control tuning range, low silicon area, among others. For real ring VCO applications, an open challenge is guaranteeing minimum phase noise, which is in conflict with main dynamical characteristics when maximizing frequency range, voltage-control range, gain, and minimizing silicon area and power consumption. To cope with these design problems, we show the minimization of the phase noise of a ring VCO applying two metaheuristics, namely: Differential evolution (DE) and particle swarm optimization (PSO), which have the ability to handle constraints that are relevant to generate optimal solutions. The results show that both DE and PSO are effective in the optimization of the ring VCO. The comparison of the best phase noise results obtained with DE (-129.01 dBc/Hz @1MHz) and PSO (-124.67 dBc/Hz @1MHz) algorithms, not only show that the DE solution being lower by 4.34 dBc/Hz with respect to the best solution provided by PSO, but also it is quite satisfactory in contrast to similar works. Finally, the optimized ring VCO characteristics are compared herein with several designs considering a figure of merit, gain, frequency and voltage-control ranges.

References

[1]	S. Huang, T. Lu, Z. Lu, J. Rong, X. Zhao, J. Li, Cmos image sensor fixed pattern noise calibration scheme based on digital filtering method, Microelectron. J., 124 (2022), 105431. https://doi.org/10.1016/j.mejo.2022.105431 doi: 10.1016/j.mejo.2022.105431
[2]	A. Lberni, A. Sallem, M. A. Marktani, N. Masmoudi, A. Ahaitouf, A. Ahaitouf, Influence of the operating regimes of mos transistors on the sizing and optimization of cmos analog integrated circuits, AEU-Int. J. Electron. Commun., 143 (2022), 154023. https://doi.org/10.1016/j.aeue.2021.154023 doi: 10.1016/j.aeue.2021.154023
[3]	G. Souliotis, E. Keramida, F. Plessas, R. Malatesta, S. Vlassis, Temperature compensated ring oscillator based VCO, AEU-Int. J. Electron. Commun., 149 (2022), 154195. https://doi.org/10.1016/j.aeue.2022.154195 doi: 10.1016/j.aeue.2022.154195
[4]	E. G. Talbi, Metaheuristics: From design to implementation, Vol. 74, John Wiley & Sons, 2009.
[5]	X. Zhang, Z. Zhu, C. Zhang, Multi-stage differential evolution algorithm for constrained d-optimal design, AIMS Math., 6 (2021), 2956–2969. https://doi.org/10.3934/math.2021179 doi: 10.3934/math.2021179
[6]	Z. Sabir, M. A. Z. Raja, A. Arbi, G. C. Altamirano, J. Cao, Neuro-swarms intelligent computing using Gudermannian kernel for solving a class of second order Lane-Emden singular nonlinear model, AIMS Math., 6 (2020), 2468–2485. https://doi.org/10.3934/math.2021150 doi: 10.3934/math.2021150
[7]	H. Li, S. Xiang, Y. Yang, C. Liu, Differential evolution particle swarm optimization algorithm based on good point set for computing nash equilibrium of finite noncooperative game, AIMS Math., 6 (2021), 1309–1323. https://doi.org/10.3934/math.2021081 doi: 10.3934/math.2021081
[8]	Y. Sun, W. Deng, B. Chi, A fom of -191 dB, 4.4-GHz LC-VCO integrating an 8-shaped inductor with an orthogonal-coupled tail-filtering inductor, In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2020, 1–4. https://doi.org/10.1109/ISCAS45731.2020.9180559
[9]	R. Póvoa, R. Lourenço, N. Lourenço, A. Canelas, R. Martins, N. Horta, LC-VCO automatic synthesis using multi-objective evolutionary techniques, In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2014,293–296. https://doi.org/10.1109/ISCAS.2014.6865123
[10]	X. Yang, C. H. Chan, Y. Zhu, R. P. Martins, A calibration-free ring-oscillator pll with gain tracking achieving 9% jitter variation over PVT, IEEE Trans. Circuits Syst. I, 67 (2020), 3753–3763. https://doi.org/10.1109/TCSI.2020.3013625 doi: 10.1109/TCSI.2020.3013625
[11]	H. Yan, F. Lin, A low phase noise injection-locked ring pll based a sub-sampling loop, In: 2019 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), IEEE, 2019, 21–22. https://doi.org/10.1109/ICTA48799.2019.9012841
[12]	J. Sharma, H. Krishnaswamy, A 2.4-GHz reference-sampling phase-locked loop that simultaneously achieves low-noise and low-spur performance, IEEE J. Solid-State Circuits, 54 (2019), 1407–1424. https://doi.org/10.1109/JSSC.2018.2889690 doi: 10.1109/JSSC.2018.2889690
[13]	Z. Chen, W. Deng, H. Jia, Y. Liu, J. Wu, P. Guan, et al., A U-band PLL using implicit distributed resonators for sub-THz wireless transceivers in 40 nm CMOS, IEEE Trans. Circuits Syst. II, 67 (2020), 1574–1578. https://doi.org/10.1109/TCSII.2020.2999753 doi: 10.1109/TCSII.2020.2999753
[14]	Y. Hu, T. Siriburanon, R. B. Staszewski, Oscillator flicker phase noise: A tutorial, IEEE Trans. Circuits Syst. II, 68 (2021), 538–544. https://doi.org/10.1109/TCSII.2020.3043165 doi: 10.1109/TCSII.2020.3043165
[15]	E. Tlelo-Cuautle, P. R. Castañeda-Aviña, R. Trejo-Guerra, V. H. Carbajal-Gómez, Design of a wide-band voltage-controlled ring oscillator implemented in 180 nm CMOS technology, Electronics, 8 (2019), 1156. https://doi.org/10.3390/electronics8101156 doi: 10.3390/electronics8101156
[16]	D. Liu, Z. Liu, L. Li, X. Zou, A low-cost low-power ring oscillator-based truly random number generator for encryption on smart cards, IEEE Trans. Circuits Syst. II, 63 (2016), 608–612. https://doi.org/10.1109/TCSII.2016.2530800 doi: 10.1109/TCSII.2016.2530800
[17]	J. P. Caram, J. Galloway, J. S. Kenney, Voltage-controlled ring oscillator with fom improvement by inductive loading, IEEE Microw. Wirel. Compon. Lett., 29 (2019), 122–124. https://doi.org/10.1109/LMWC.2019.2891168 doi: 10.1109/LMWC.2019.2891168
[18]	D. Biswas, Phase noise reduction by resistor abutment in differential ring vcos, Analog Integr. Cir. Sig. Process., 111 (2022), 153–158. https://doi.org/10.1007/s10470-022-02003-4 doi: 10.1007/s10470-022-02003-4
[19]	H. H. Ting, T. C. Lee, 25.6 A 5.25 GHz subsampling pll with a VCO-phase-noise suppression technique, In: 2020 IEEE International Solid-State Circuits Conference-(ISSCC), IEEE, 2020,390–392. https://doi.org/10.1109/ISSCC19947.2020.9063009
[20]	K. Karthigeyan, S. Radha, Current reuse oscillator design for 5G mobile application using 90 nm CMOS, In: 2020 International Conference on Communication and Signal Processing (ICCSP), IEEE, 2020, 0734–0737. https://doi.org/10.1109/ICCSP48568.2020.9182135
[21]	M. Azizi Poor, O. Esmaeeli, S. Sheikhaei, A low phase noise quadrature VCO using superharmonic injection, current reuse, and negative resistance techniques in CMOS technology, Analog Integr. Cir. Sig. Process., 99 (2019), 633–644. https://doi.org/10.1007/s10470-018-1380-5 doi: 10.1007/s10470-018-1380-5
[22]	N. Kandpal, A. Singh, A. Agarwal, A machine learning driven PVT-robust VCO with enhanced linearity range, Circuits, Syst. Signal Process., 2022, 1–18. https://doi.org/10.1007/s00034-022-02001-x
[23]	M. Panda, S. K. Patnaik, A. K. Mal, Performance enhancement of a vco using symbolic modelling and optimisation, IET Circ. Devices Syst., 12 (2018), 196–202.
[24]	M. Panda, S. K. Patnaik, A. K. Mal, S. Ghosh, Fast and optimised design of a differential VCO using symbolic technique and multi objective algorithms, IET Circ. Devices Syst., 13 (2019), 1187–1195.
[25]	E. Tlelo-Cuautle, M. A. Valencia-Ponce, L. G. de la Fraga, Sizing cmos amplifiers by PSO and MOL to improve DC operating point conditions, Electronics, 9 (2020), 1027. https://doi.org/10.3390/electronics9061027 doi: 10.3390/electronics9061027
[26]	M. Panda, S. K. Patnaik, A. K. Mal, Performance enhancement of a VCO using symbolic modelling and optimisation, IET Circ. Devices Syst., 12 (2018), 196–202.
[27]	V. Alizadeh, H. Fehri, M. Kessentini, Less is more: From multi-objective to mono-objective refactoring via developer's knowledge extraction, In: 2019 19th International Working Conference on Source Code Analysis and Manipulation (SCAM), IEEE, 2019,181–192. https://doi.org/10.1109/SCAM.2019.00029
[28]	N. Kumar, M. Kumar, Low power cmos differential ring VCO designs using dual delay stages in 0.13 $\mu$m technology for wireless applications, Microelectron. J., 111 (2021), 105025. https://doi.org/10.1016/j.mejo.2021.105025 doi: 10.1016/j.mejo.2021.105025
[29]	D. Dasgupta, Z. Michalewicz, Evolutionary algorithms—an overview, In: Evolutionary algorithms in engineering applications, Springer, 1997, 3–28. https://doi.org/10.1007/978-3-662-03423-1_1
[30]	A. Kaveh, Advances in metaheuristic algorithms for optimal design of structures, Springer, 2014.
[31]	X. S. Yang, Engineering optimization: An introduction with metaheuristic applications, John Wiley & Sons, 2010.
[32]	J. K. Sahani, A. Singh, A. Agarwal, A fast locking and low jitter hybrid ADPLL architecture with bang bang PFD and PVT calibrated flash TDC, AEU-Int. J. Electron. Commun., 124 (2020), 153344. https://doi.org/10.1016/j.aeue.2020.153344 doi: 10.1016/j.aeue.2020.153344
[33]	W. Deng, J. Xu, Y. Song, H. Zhao, Differential evolution algorithm with wavelet basis function and optimal mutation strategy for complex optimization problem, Appl. Soft Comput., 100 (2021), 106724. https://doi.org/10.1016/j.asoc.2020.106724 doi: 10.1016/j.asoc.2020.106724
[34]	T. Li, J. Shi, W. Deng, Z. Hu, Pyramid particle swarm optimization with novel strategies of competition and cooperation, Appl. Soft Comput., 121 (2022), 108731. https://doi.org/10.1016/j.asoc.2022.108731 doi: 10.1016/j.asoc.2022.108731
[35]	I. Y. Lee, D. Im, Low phase noise ring vco employing input-coupled dynamic current source, Electron. Lett., 56 (2020), 76–78.
[36]	X. Gui, R. Tang, Y. Zhang, D. Li, L. Geng, A voltage-controlled ring oscillator with VCO-gain variation compensation, IEEE Microw. Wirel. Compon. Lett., 30 (2020), 288–291. https://doi.org/10.1109/LMWC.2020.2967391 doi: 10.1109/LMWC.2020.2967391
[37]	D. Samaras, A. Hatzopoulos, High performance, wide tuning range 65 nm CMOS tunable voltage controlled ring oscillator up to 11 GHz, In: 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), IEEE, 2020, 1–4. https://doi.org/10.1109/MOCAST49295.2020.9200291
[38]	G. K. Sharma, T. B. Kumar, A. K. Johar, D. Gupta, D. Boolchandani, Tuning range enhancement using current boosting in common source amplifier based ring oscillator, In: 2019 International Conference on Advances in Computing, Communication and Control (ICAC3), IEEE, 2019, 1–4. https://doi.org/10.1109/ICAC347590.2019.9036846
[39]	C. Yan, J. Wu, C. Hu, X. Ji, A low power wide tuning range two stage ring VCO with frequency enhancing, IEICE Electron. Expr., 16 (2019), 20190090. https://doi.org/10.1587/elex.16.20190090 doi: 10.1587/elex.16.20190090
[40]	D. Gaidioz, M. De Matos, A. Cathelin, Y. Deval, Ring VCO phase noise optimization by pseudo-differential architecture in 28 nm FD-SOI CMOS, In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2020, 1–4. https://doi.org/10.1109/ISCAS45731.2020.9180557

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