Hepatitis-B disease modelling of fractional order and parameter calibration using real data from the USA

1.   Introduction

The accelerating adoption of electric vehicles (EVs) is largely motivated by the global urgency to mitigate climate change, with fossil fuel–based transportation being a major contributor to greenhouse gas emissions ^[1,2]. Governments and the private sector are working together to advance EV technologies, aiming to make EVs as viable and accessible as conventional vehicles. A critical factor influencing EV efficiency and performance is the battery system, which governs key metrics like driving range, reliability, and lifespan. The battery is managed by a battery management system (BMS), which ensures safe operation by monitoring thermal and electrical parameters, balancing cell charge, and coordinating other auxiliary functions ^[3].

Apart from batteries, the efficiency of EVs relies heavily on power converters, specifically the traction inverter and the battery charger (BC). While the inverter controls power flow between the battery and motor, the BC regulates energy transfer from the grid (or alternative sources) to the battery, impacting attributes such as charging speed, range, and battery longevity ^[4]. BCs are classified based on factors like charging type (conductive vs. inductive), installation location (on-board vs. off-board), and power flow capability (unidirectional vs. bidirectional). Established standards such as IEC 61851-1 and SAE J1772 further distinguish BC types based on charging modes, levels, and safety protocols ^[1].

DC fast chargers and their associated power converter topologies, such as single-phase and three-phase isolated and non-isolated converters, are widely implemented in EV charging infrastructure. For instance, on-board battery chargers (OBCs) commonly integrate an EMI filter, an AC-DC converter with power factor correction (PFC), and a DC-DC converter. Variants of these topologies allow bidirectional power flow to support vehicle-to-grid interactions, enhancing grid flexibility ^[2]. However, while existing works cover a range of converter configurations and performance optimization methods ^[2,5,6], most omit the impact of non-idealities inherent in switching devices and energy storage components. These non-idealities, associated with parameters like switch resistance and inductor characteristics, significantly affect converter efficiency, dynamic response, and control accuracy.

In this study, we investigate a two-level DC-DC battery charger (2L-BC) with a focus on modeling and compensating for these non-idealities. Prior literature on DC-DC converters includes insightful contributions regarding fast-charging infrastructure and converter configurations ^[7,8,9,10]. Yet, few works address the non-ideal behavior of converters in EV battery charging contexts. For instance, research on general DC-DC converters has examined the impact of non-idealities in switch and inductor behavior, although without direct application to EV charging systems ^[11,12,13].

This article presents a comprehensive study of a 2L-BC model that includes the effects of non-idealities in switches and energy storage components, which is an area not commonly addressed in depth within the literature. The analysis focuses on how these non-ideal parameters influence essential operating points and performance metrics under both steady-state and dynamic conditions, offering critical insights for enhancing EV charger design and efficiency.

A key part of this study examines the equilibrium voltage V_C and its sensitivity to series resistances r_L and R_DS(on), revealing that as these parasitic resistances increase, V_C decreases significantly. This finding highlights the impact of non-idealities on output stability and efficiency. The analysis further investigates the inductance L and capacitance C under varying non-ideal conditions, showing that L decreases as both r_L and R_DS(on) decrease, establishing a direct relationship that influences energy transfer and response time in the converter. In contrast, the capacitance C remains nearly constant despite variations in r_L and r_C, confirming its stabilizing role in smoothing voltage ripples in the system.

Additionally, this study highlights the effects of non-idealities on charger efficiency (η). The analysis shows that efficiency peaks under ideal conditions, where parasitic resistances are minimized, while increased parasitic resistances cause a notable drop in performance. These findings emphasize the importance of accounting for non-ideal effects in charger design, providing essential considerations for optimizing both steady-state and transient behaviors in EV charging systems.

The paper is organized as follows: Sections 2 and 3 present the topology and mathematical model of the studied charger. Sections 4 and 5 explore the charger's efficiency and sensitivity to non-idealities incorporated in the model. Sections 6 and 7 focus on the dimensioning of energy storage components, such as the inductor and capacitor, and the synthesis of the linear output-feedback compensator. Finally, Sections 8 and 9 present the simulation results and conclusions of the study.

2.   Battery charger topology

The proposed battery charger topology (2L-BC) is illustrated in Figure 1. It is based on a two-level DC-DC converter, with the load modeled as a standard battery ^[14]. The 2L-BC topology consists of two switches, labeled Q₁ and Q₂, which operate complementarily ^[15]. These switches are implemented using MOSFET devices, each incorporating its associated R_DS(on) resistance and driving resistors.

In addition to the switches, the 2L-BC model includes the series resistances of the inductor (r_L) and capacitor (r_C), which reflect the non-idealities in these components. The battery is represented by its internal voltage, v_OB(t), and its internal resistance, r_B. The system variables include the input voltage, v_d(t), the inductor voltage, v_L(t), and the capacitor voltage, v_C(t). The currents flowing through the inductor, capacitor, and battery are denoted as i_L(t), i_C(t), and i_B(t), respectively.

It is assumed that the 2L-BC operates in continuous conduction mode, ensuring a stable operating regime for the converter under all conditions.

3.   Battery charger modeling

This section presents the modeling of the 2L-BC charger in both steady-state and dynamic regimes.

3.1.   Modeling 2L-BC in steady state

As a preliminary step in the modeling process, it is essential to identify the switching strategy employed by the converter switches (Q₁ and Q₂). This enables the determination of the switching function of the system in a steady state, which is represented by the variable s_f(t). The switching frequency of the 2L-BC is labeled as f_s, and the switching period is defined as T_s = 1/f_s. It is known that both switches operate in a complementary manner, and thus, the following strategy is derived and defined as follows: in the first half-cycle of the switching period, i.e., when 0 ≤ t < D∙T_s, switches Q₁ and Q₂ operate as closed and open, respectively. Subsequently, for the second half-cycle, that is, when D∙T_s ≤ t < T_s, Q₁ and Q₂ operate as open and closed, respectively. With this information, it is possible to define s_f(t) as follows ^[17]:

It should be noted that D is the duty cycle under stationary conditions.

The governing equations for the voltage of L [v_L(t)] and the current of C [i_C(t)] are derived by applying Kirchhoff's laws of voltage and current. These equations are functions of the variation of the topology as the switching half-cycles occur. The topology in the first switching half-cycle is shown in Figure 2(a), and the expressions for v_L(t) and i_C(t) are given by:

where R_in = R_DS(on) + r_L. In contrast, the small ripple approximation (SRA) principle is applied to (2) and (3), assuming that the ripple of the voltages v_d(t), v_C(t), and v_OB(t) and of the current i_L(t) is sufficiently small to be neglected, a common assumption in practice ^[15,16]. The revised versions of (2) and (3) following the application of the SRA are presented in (4) and (5).

The topology of the system when operating in the second half-cycle is depicted in Figure 2(b), and the expressions of v_L(t) and i_C(t) are defined as follows:

Then, applying the SRA to (6) and (7), the new equations related to this switching half-cycle are given by:

In light of the fact that the 2L-BC operates in a state of steady-state, the principles of inductor volt-second balance and capacitor charge balance are applied to the system. With regard to the former, it is demonstrated that the average voltage of L over one switching period (T_s), i.e., < v_L(t) > _Ts, must be zero ^[15]. Consequently, the inductor volt-second balance is calculated from (4) and (8) and stated as follows:

Conversely, the capacitor charge balance principle is applied according to (5) and (9), resulting in the verification that equation < i_C(t) > _Ts = 0, as given by ^[15]:

It should be noted that (10) and (11) represent the model of the charger in equilibrium (steady state). For this system, the unknown variables are V_C and I_L, while the known variables are D and V_OB. Solving for V_C and I_L yields the steady state variables given by:

From (11), it can be observed that the V_C dynamics under steady-state conditions exhibit a slight dependence on the charger non-idealities, particularly with regard to R_DS(on) and r_L. This is due to the fact that, in practice, r_B is significantly larger than R_in, resulting in r_B || R_in ≈ r_B. Therefore, the equilibrium state of the system may change if such resistances are not considered. The model of the charger in steady-state is illustrated in Figure 3.

3.2.   Modeling 2L-BC in steady state

Figure 2 and (1)−(3), (8), and (9) provide the 2L-BC switching model defined by

Subsequently, the averaging operator ${\left\langle{x\left(t\right)}\right\rangle}_{{T}_{\mathrm{s}}} = \frac{1}{{T}_{\mathrm{s}}} \cdot {\int }_{t-{T}_{\mathrm{s}}}^{t}x\left(\tau \right) \cdot \mathrm{d}\tau$ is applied to (13) over a T_s, resulting in the averaged model of the 2L-BC, defined as follows ^[15,17]:

Finally, the model in (14) is linearized using the Taylor series and the perturbation of the variables around the points of the charger ^[11,18] in steady-state. The equilibrium model of the charger, as represented in (12) ^[15,17], is used to calculate the steady-state values. It should be noted that in the switched model of the charger described in (13), the switching function is replaced by its averaged version, with the addition of a small disturbance in AC, i.e., d(t). The linearization of the charger results in the derivation of the small-signal state-space model, shown as follows:

It should be noted that the variables with hats are the small-signal variables, which are assumed to be much smaller than their steady-state variables ^[15]. The state vector, defined in (15) as ${\mathbf{x}}\left(t\right) = {\left[\begin{array}{cc}{\widehat{i}}_{\mathrm{L}}\left(t\right), & {\widehat{v}}_{\mathrm{C}}\end{array}\left(t\right)\right]}^{\mathrm{T}},$ groups the state variables. The input vector, defined as ${\mathbf{u}}\left(t\right) = {\left[\begin{array}{ccc}{\widehat{v}}_{\mathrm{d}}\left(t\right), & {\widehat{v}}_{\mathrm{O}\mathrm{B}}\left(t\right), & \widehat{d}\left(t\right)\end{array}\right]}^{\mathrm{T}}$, groups the input variables. Finally, the output vector, defined as y(t) = [x(t), ${\widehat{i}}_{\mathrm{B}}\left(t\right)$]^T, groups the input variables. In this charger, the outputs have been defined as the state variables plus the load current. Furthermore, x(t) ∈ {$\mathbb{R}^2$} and {u(t), y(t)} ∈ {$\mathbb{R}^3$}. Conversely, the matrices of the model in (15) are defined as follows:

From here, A_m, B_m, C_m, and D_m are the state, input, output, and direct transmission matrices, respectively. Also, A_m $\mathscr{M}_{{\rm{2x2}}}$ ∈ {Κ}, B_m $\mathscr{M}_{{\rm{2x3}}}$ ∈ {Κ}, C_m, $\mathscr{M}_{{\rm{3x2}}}$ ∈ {Κ}, and D_m $\mathscr{M}_{{\rm{3x3}}}$ ∈ {Κ}.

4.   Efficiency calculation

An interesting figure of merit to characterize the charger is the expression of the performance parameter (η) ^{[15,19,20,21]}. It is known that η = P_o/P_i, where P_i and P_o are the input and output power of the charger, respectively. According to Figure 3, P_i and P_o are given by

From (17), A_v1 and A_v2 are defined as steady-state voltage gains, specifically A_v1 = V_C/V_d and A_v2 = V_C/V_OB. Then, the expression of η is calculated and shown as follows:

It is interesting to note that this expression is of the nonlinear type, mainly due to the presence of A_v1 and A_v2. Furthermore, it can be seen that the efficiency is strongly dependent on the non-idealities R_DS(on) and r_L, and it can be confirmed from (18) that this dependence is of the hyperbolic type.

Some observations can be drawn from the latter:

● The efficiency is highly sensitive to the non-idealities of the charger, such as the resistance R_DS(on) and the inductor resistance r_L.

● The dependence on these resistances follows a hyperbolic type, emphasizing that as the losses increase (due to higher R_DS(on) or r_L), the efficiency decreases.

This section highlights the importance of these non-idealities in the performance of the charger and how they affect its overall efficiency. The equation provides a framework to optimize the design by minimizing these losses to maximize efficiency.

5.   Sensitivity analysis

The goal of the sensitivity analysis is to evaluate how variations in the non-ideal resistive parameters—specifically r_L, r_C, and R_DS(on)—affect the efficiency η of the 2L-BC. By computing partial derivatives of the efficiency equation with respect to each of these parameters ^[22], insights are obtained into the individual and relative impacts of each non-ideality on system efficiency.

5.1.   Sensitivity to r_L

The analysis of sensitivity with respect to the inductor resistance r_L reveals its significant influence on the overall efficiency η of the 2L-BC. As r_L directly contributes to the input resistance R_in (where R_in = R_DS(on) + r_L), an increase in r_L raises R_in, thereby affecting the voltage gain terms A_v1 and A_v2, both of which depend on R_in. The partial derivative of efficiency with respect to r_L is given by:

Equation (19) indicates that the sensitivity of η to r_L is inversely proportional to R_in². This hyperbolic relationship implies that an increase in r_L leads to a decrease in efficiency, highlighting r_L as a critical parameter. Reducing r_L by selecting low-resistance inductors or optimizing inductor design can mitigate resistive losses and enhance charger efficiency. Thus, managing inductor resistance is essential for optimizing overall system performance, particularly in high-efficiency applications

5.2.   Sensitivity to rC

The capacitor resistance r_C influences the voltage gain A_v2, defined as the ratio of the capacitor voltage V_C to the output voltage V_OB. Changes in r_C modify A_v2, which in turn affects efficiency. The partial derivative of η with respect to r_C is expressed as:

Expression (20) shows that the sensitivity of η to r_C is influenced by r_C's interactions with r_B and R_in. This complex relationship implies that increasing r_C can significantly affect efficiency due to its quadratic effect on the gain term, reducing η more strongly as r_C rises. Consequently, minimizing r_C through capacitor selection or design adjustments can enhance efficiency, especially in systems where resistive losses are critical. This emphasizes the importance of keeping r_C low for optimal performance in high-efficiency charging applications.

5.3.   Sensitivity to RDS(on₎

The MOSFET on-resistance R_DS(on) also contributes to R_in, thus influencing both voltage gains A_v1 and A_v2, which impact efficiency. The sensitivity of η to R_DS(on) is derived by differentiating the efficiency equation with respect to R_DS(on):

Expression (21) reveals that R_DS(on) and r_L produce identical sensitivity effects on η due to their combined role in R_in. The analysis indicates that increases in either R_DS(on) or r_L lead to efficiency reductions, as both raise R_in, which in turn lowers A_v1 and A_v2, thus decreasing η. This result underscores the importance of minimizing both R_DS(on) and r_L to improve efficiency, especially in high-performance charger designs where resistive losses need to be minimized.

6.   L and C sizing

In order to calculate the energy storage elements, L and C, the slopes (m) of i_L(t) and v_C(t) during the first switching half-cycle, i.e., in the time interval 0 ≤ t < D∙T_s, are considered. These slopes are obtained from (4) and (5), respectively. Additionally, the slopes of i_L(t) and v_C(t) are depicted in Figure 4(a) and (b), respectively. Based on Figure 4 and the aforementioned equations, the values of L and C are calculated and presented as follows:

From (22) and (23), the maximum allowable ripple percentages with respect to V_C and I_L, i.e., ΔV_C and ΔI_L respectively, can be calculated. It can also be seen that both ΔV_C and ΔI_L represent the constraints imposed on 2L-BC, which must be met. It is once again evident that the non-idealities of the charger affect the sizing of the energy storage elements, specifically at L and C. Nevertheless, as indicated by (22) and (23), the sizing of L is more significantly influenced by the variation of R_DS(on) and r_L than by the sizing of C.

7.   Compensator synthesis

The linear model in (15) is considered, and the Laplace transform (s) is applied to obtain the s-domain model shown as follows:

In (24), I is an identity matrix of dimension 2×2. From (24), it follows that Y(s) = [I_L(s), V_C(s), I_B(s)]^T and U(s) = [V_d(s), V_OB(s), D(s)]^T are the complex output and input vectors, respectively. These vectors are defined as {U(s), Y(s)} ∈ .

Figure 5 presents the proposed control diagram for the 2L-BC, structured with a standard output feedback configuration ^[18]. The primary control goal is to regulate i_B(t) using a PI compensator, chosen for its simplicity and well-established performance in power electronics applications. The PI compensator, extensively studied in the literature, is widely recognized for its effectiveness in reducing steady-state errors and ensuring stable transient responses, making it highly suitable for systems like the 2L-BC.

In this configuration, the PI controller outputs the duty cycle d(t), which is then fed into the charger modulator. The modulator produces the switching function s_f(t), which manages the states of switches Q₁ and Q₂ according to (1). This approach leverages the robustness of PI control to handle non-idealities in the 2L-BC, thereby enhancing system stability and performance across variable load conditions.

The transfer function of interest for this control system is obtained from (24), which corresponds to:

The steady-state gain (k), the zero (ω_z), and the poles (ω_p1 and ω_p2) are defined as follows:

The controller described in Figure 5 is designed using the phase-margin test (PMT) ^[15]. As illustrated in Figure 5, and in accordance with the extensive literature on PI compensators, this compensator can be modeled as follows ^[15]:

where k_p and τ_i are the proportional and integral constants, respectively. The block diagram associated with this loop is illustrated in Figure 6. On the other hand, the loop gain of the system is defined by:

On the other hand, the modulator is based on pulse-width modulation (PWM), and its design and operation are described in Figure 7 ^[15,16]. Its Laplace model is given by M(s) = 1/V_M, where, in this case, V_M = 1 V. The high-frequency carry function is represented by the following model:

According to the PMT, it is necessary to study the frequency behavior of the loop gain where the compensator G_c(s) is not involved, assuming that G_c(s) ≈ 1. This loop gain [T_u(s)] is given by:

Table 1 provides a list of the parameters associated with the charger under study ^[23]. Table 1 indicates that the frequency response of (30) can be obtained and illustrated in Figure 8. With regard to the PMT, the crossover frequency (f_c) of the frequency response of T_u(s) can be considered to be equal to the switching frequency of the charger, that is, f_c = f_s = 27 kHz. Consequently, Figure 8 reveals that f_c ≈ 13.2 kHz. Consequently, a compensator is necessary to bring the f_c of the uncompensated system as close as possible to f_s. As part of the procedure, the compensated loop gain of the system has been defined in (25). However, by making the change of variable s = j∙ω, assuming ω > > 1, defining that ω_c = ω_s, and considering (24):

valid for high frequencies. The PMT can be applied to yield the following ^[15]:

and, to ensure good stability, τ_i = 100/ω_s is defined ^[15]. Consequently, the PI compensator has already been designed. In order to verify that the PI has been properly designed, (28) must be evaluated. Figure 9 illustrates the frequency response of the compensated loop gain.

From Figure 9, it can be established that the f_c (≈ 29 kHz) is close to f_s, which indicates that the design of the PI compensator is adequate.

8.   Simulation results

The simulation of the switched and averaged 2L-BC models defined in (13) and (14), respectively, is performed using MATLAB Simulink and Table 1. The control system proposed in Figure 5 is also implemented. The 2L-BC is supplied with a dc voltage V_d = 800 V and operates with an f_s of 27 kHz.

The initial conditions of the 2L-BC are imposed on the battery and inductor currents, as well as on the capacitor voltage. This is indicated by the following values: i_B0 = i_L0 = 0 A and v_C0 = 400 V. In contrast, the initial reference value of the load current is I*_B = 30 A.

Figure 10 depicts the simulation results for the transient dynamic responses of i_B(t), i_L(t), v_C(t), d(t), and v_OB(t) in their switched version, i.e., i_Bsm(t), i_Lsm(t), v_Csm(t), d_sm(t), v_OBsm(t), and in their averaged version, i.e., i_Bav(t), i_Lav(t), v_Cav(t), d_av(t), and v_OBav(t), respectively. Regarding the 2L-BC operation, at 60 ms, there is a step change in i_B(t), reaching a new value of 40 A and subsequently entering a steady state. Additionally, at 90 ms, a change in the load is generated, resulting in a shift in the internal battery voltage, v_OB(t), from 450 to 350 V. This disturbance in the system dynamics is observed at 90 ms.

Figure 10(a) illustrates that i_B(t) behaves as if it were a first-order system, exhibiting no overshoot and zero steady-state errors. The settling times are notably brief, with i_B(t) reaching its steady state after startup in just 30 ms. Following the step change in i_B^*(t), i_B(t) reaches its final steady-state value in 4 ms. Furthermore, upon the occurrence of a change in load, a transient is generated in i_B(t) of a very short duration (resembling a pulse, as described by ^[18]), with a duration of approximately 1.5 µs, after which it returns to its steady state value of 40 A. This situation serves to illustrate the optimal design of the PI compensator, while also demonstrating the adequate stability of the system.

Conversely, it can be demonstrated that the sizing of L and C is adequate and meets the ripple requirement. That is, the ripple of i_L(t) and v_C(t) is lower than ΔI_L and ΔV_C, respectively.

As illustrated in Figure 10(b) and (c), it can be observed that the values of ΔI_L and ΔV_C reach 0.16% and 2.4%, respectively.

In addition, the dynamics of i_L(t) and v_C(t) are observed to work correctly with a step change in i_B^*(t) and a change in load. After starting, v_C(t) takes the value of 480 V and i_L(t) takes the value of 30 A.

Then, for the step change in i_B(t), a logical increase in both variables [in i_L(t) and v_C(t), respectively] is generated. Finally, when the disturbance is generated in the load, i_L(t) takes its maximum value of 45.43 A and, after 13 ms, it returns to its value of 40 A. On the other hand, v_C(t) suffers a significant decrease, taking a transient value of 395.4 V, and after 10 ms, it reaches its final steady state value of 390 V. Such a condition generated in both variables after the load disturbance can be verified by analyzing expressions (2), (3), (6), and (7).

In Figure 10(d), it is observed that after system startup, the duty ratio d(t) takes the value of 0.64. After the step change in i_B(t), d(t) takes a new steady state value of 0.66 and finally, when the load change occurs, d(t) undergoes an impulse type of disturbance and reaches its minimum value of 0.01 for a time of 1.5 μs [similar to i_B(t)]. It also assumes a new steady state value of 0.54. On the other hand, a stable and unsaturated behavior is observed at d(t), which implies a greater slack in the control of i_B(t). In addition, a small overshoot in d(t) is observed in response to the step change in i_B(t). It is also observed that the switching frequency f_s is transferred to d(t) due to the operation of the switches according to the switching strategy described in (1).

Figure 11 presents a series of surface plots analyzing the effects of variations in non-ideal parameters on the equilibrium point V_C and the values of inductance L and capacitance C. Specifically, Figure 11(a) shows the equilibrium voltage V_C as a function of inductor resistance r_L and MOSFET on-resistance R_DS(on); Figure 11(b) illustrates the variation of L as a function of r_L and R_DS(on); and Figure 11(c) depicts the variation of C as a function of r_L and capacitor resistance r_C. The constant parameters and respective variables are listed in Table 2.

In Figure 11(a), the expression for V_C follows (12), while the expressions for L and C in Figures 11(b) and 11(c) are given by (22) and (23), respectively. From Figure 11(a), it is evident that V_C decreases significantly with increases in r_L and R_DS(on), indicating an inverse relationship. This finding aligns with the sensitivity analysis, which showed that higher r_L and R_DS(on) reduce efficiency due to increased input resistance R_in, impacting the voltage gain terms A_v1 and A_v2.

In Figure 11(b), the value of L decreases as both r_L and R_DS(on) decrease, demonstrating a direct relationship between L and these parameters. This relationship is consistent with the overall system's sensitivity to resistive elements, suggesting that minimizing r_L and R_DS(on) can mitigate resistive losses and positively influence system performance.

In contrast, Figure 11(c) indicates that the magnitude of C remains nearly constant despite variations in r_L and r_C, confirming the observations in Section 6. The value of C appears close to zero in the plot for scaling purposes, although it is approximately 100 nF.

Figure 12 illustrates the sensitivity of efficiency η as a function of r_L and R_DS(on), derived from (18). The surface plot reveals that charger performance is maximized under ideal conditions, where r_L = R_DS(on) = 0. As these non-ideal parameters increase, efficiency η declines sharply, consistent with the sensitivity analysis that showed an inverse relationship between η and both r_L and R_DS(on). This trend underscores the critical importance of minimizing these resistive losses when designing high-efficiency chargers. Table 3 lists the constant parameters and the variables relevant to this analysis.

These observations provide essential design insights, highlighting that reducing non-idealities r_L, R_DS(on), and r_C is imperative for maintaining high efficiency in charger applications.

Figure 13 depicts the surfaces plotted in relation to the sensitivity expressions derived in (19)−(21). From this, it can be demonstrated that as r_L and R_DS(on) increase, the efficiency (η) decreases significantly until a saturated value is reached [see Figure 13(a)]. Additionally, Figure 13(b) illustrates that as r_C increases, η also decreases significantly. This further verifies the strong dependence of these non-idealities on the behavior of η.

Figure 14 illustrates the step response of the loop gain in (25). From this figure, it can be observed that the dynamics under transient of (25) behave as a first-order system. Moreover, it can be identified that the system reaches a steady state at approximately 20 ms, demonstrating that the system responds rapidly to disturbances of this nature.

Finally, Figure 15 depicts the root locus diagram of (28). From this figure, it can be concluded that the loop gain exhibits a totally stable behavior, as all its poles are in the left half-plane of the s-plane. Furthermore, it is demonstrated that the system in question (28) has two zeros and two poles.

9.   Conclusions

This work presents a detailed analysis of the two-level battery charger (2L-BC) performance using both switched and averaged models, with simulations conducted to validate the proposed control system and its design. The simulation results demonstrate that the system performs effectively under a range of operating conditions, with robust transient responses and well-behaved dynamic characteristics. Specifically, the battery current, inductor current, and capacitor voltage exhibit first-order dynamics, with settling times of just 30 ms after startup and 4 ms following step changes in load. These results confirm the rapid response capabilities of the system, highlighting the efficient performance of the PI compensator in maintaining minimal steady-state errors and overshoot.

Ripple analysis further supports the adequacy of the system design, with the ripple in inductor current and capacitor voltage kept well below the specified limits, verifying that the inductance and capacitance values chosen meet the performance requirements. The duty cycle shows stable behavior even during load changes, further illustrating the control strategy's effectiveness in maintaining system stability under dynamic conditions. These findings underscore the importance of a well-designed control system that can manage real-time variations while minimizing ripple and ensuring efficient power conversion.

Sensitivity analyses on non-ideal parameters, including inductor resistance, MOSFET on-resistance, and capacitor resistance, reveal their significant impact on system performance, particularly efficiency and equilibrium voltage. As these resistive losses increase, efficiency declines due to higher losses in the power stages. The equilibrium voltage decreases with higher values of inductor resistance and MOSFET on-resistance, highlighting the importance of minimizing these resistances to maintain high efficiency. Additionally, the analysis confirms that the sizing of the inductor and capacitor is well-calibrated to meet ripple requirements without compromising performance.

The efficiency analysis indicates that maximum performance is achieved when resistive losses are minimized. As resistances such as inductor resistance, MOSFET on-resistance, and capacitor resistance increase, efficiency declines sharply, reinforcing the need for careful component selection to reduce these non-idealities. The results suggest that even small increases in these resistances can lead to significant efficiency losses, underscoring the importance of considering component tolerances and non-idealities during the design phase.

The loop gain analysis indicates that the system's dynamics behave as a first-order system, with fast transient responses and minimal overshoot. The system reaches steady-state conditions quickly, demonstrating its ability to respond efficiently to rapid disturbances. The root locus analysis confirms the stability of the control system, with all poles residing in the left half-plane of the s-plane, ensuring robust performance under various operating conditions.

Overall, the findings from this study offer valuable insights into the design and optimization of battery chargers, emphasizing the importance of selecting components with low resistances to maximize system efficiency. The proposed control system is shown to be effective in ensuring stable and efficient operation, providing an essential framework for future developments in high-efficiency power converters. Future research could explore further refinements in the control strategy and experimental validation, as well as the integration of more advanced control techniques, such as model predictive or sliding mode control, to enhance system robustness and transient response, especially in the presence of larger disturbances or component aging.

Author contributions

Conceptualization: JMCS; Formal analysis: JMCS, JLAL, and RF; Investigation: JMCS, JLAL, and RF; Methodology: JMCS and RF; Supervision: JMCS; Validation: JMCS, JLAL, and RF; Visualization: JLAL and RF; Writing − original draft: JMCS; Writing − review & editing: JLAL and RF.

Conflict of interest

The authors declare that there is no conflict of interest in this paper.