1. Introduction

As the photovoltaic industry strives towards higher conversion efficiency, technology innovations like carrier-selective passivated contact become important for next generation high-efficiency Si solar cells. This is because these contacts can eliminate high recombination at the metal/Si contact and in the heavily diffused regions [1,2,3,4]. Introduction of a thin passivating interlayer between the high recombination regions and the Si absorber mitigates their negative impact because they are not in direct contact with absorber. This reduces total recombination or saturation current density (J_{0, total}), resulting in much higher open-circuit voltage V_oc. However, the interlayer must passivate the Si surface without interfering with the majority carrier transport to ensure good fill factor (FF) and efficiency. The best example of passivated contact is the heterojunction Si cell with intrinsic thin amorphous layer (HIT). HIT cells have produced outstanding cell V_oc of 750 mV [1] with cell efficiency exceeding 25% [2]. However, this passivation scheme can not withstand temperature above 250ºC for the metallization process, and hence is not compatible with the widely used industry standard low-cost screen-printed fired-through metallization, which requires >700 °C temperature for contact-firing. Therefore, our approach to achieve carrier selective contact involves a chemically grown ultra-thin (~ 15 Å) tunnel oxide capped with phosphorus-doped (n⁺) polycrystalline Si (poly-Si) and metal contact on the entire back side of n-type Si cell, which makes it thermally stable and compatible with low-cost screen-printed metallization.

Figure 1 shows the band diagram of the tunnel oxide passivated contact structure in this study. Three parallel mechanisms contribute to carrier selectivity in this structure. First, heavily doped n⁺ poly-Si creates an accumulation layer at the absorber surface due to the work function difference between the n⁺ poly-Si and the n^- Si absorber. This accumulation layer or band bending provides a barrier for holes to get to the tunnel oxide while electrons can migrate easily to the oxide/Si interface. Next, tunnel oxide itself provides the second level of carrier selectivity, because it presents 4.5 eV barrier for holes to tunnel relative to 3.1 eV for electrons [5]. This is the most important carrier selectivity as demonstrated in this study. Third, there are very few or no states on the other side of the dielectric (n⁺ region) for holes to tunnel through because of the forbidden gap. Even if some holes are able to tunnel through, they will run into the heavily doped n⁺ poly-Si layer that offers a barrier for holes to get to the meal contact and recombine. Last but not least, due to the full area metal contact on the back, there is one dimensional current flow. This eliminates the lateral transport resistance in a finished solar cell, resulting in much higher FF.

In this work, we have investigated the influence of the phosphine and silane flow rate ratio (PH₃/SiH₄) during the PECVD deposition of amorphous Si (a-Si) film, and the subsequent crystallization and dopant activation anneal temperature on the passivation quality of carrier-selective contact. To study the performance of our passivated contact in a cell, we fabricated large area (239 cm²) n-type front junction Si solar cells with a boron-doped emitter and screen-printed contact on the front side and the tunnel oxide passivated contact on the rear side (see Figure 2).

2. Materials and Method

The interface quality of passivated rear contact was studied by the quasi-steady state photo-conductance (QSSPC) measurements [6] on symmetrical test structures Si(n⁺)/SiO_x/c-Si(n)/SiO_x/Si(n⁺). Symmetrical samples were made on commercially available n-type Cz wafers with a bulk resistivity of 5 Ωcm and bulk lifetime of over 2 ms. The sample preparation involved surface damage removal in a heated KOH solution and a RCA chemical cleaning with a resulting wafer thickness of ~ 170 µm. The tunnel oxide layer was grown in 68 wt% HNO₃ acid at a temperature of 100 °C for 10 min. The resulting tunnel oxide thickness was ~ 15 Å, determined by spectral ellipsometry. Next, a thin (<20 nm) phosphorus-doped Si layer was deposited on both sides using a PECVD tool from Unaxis. Note that both precursors PH₃ and SiH₄ were diluted with H₂ in a volume ratio of 5% for the PECVD a-Si deposition. Then, a 875 ºC/30 min thermal anneal was performed in a tube furnace in an inert atmosphere to facilitate dopant activation and crystallization of a-Si film. The flow rate ratio PH₃/SiH₄ during the PECVD deposition of a-Si film as well as the crystallization temperature was varied in order to study their impact on passivation quality. Finally, the QSSPC technique [7] was used to determine the passivation quality by extracting the implied V_oc (iV_oc) from the injection level at one sun according to following equation:

$i{V_{oc}} = \frac{{kT}}{q}{\rm{ln}}\left( {\frac{{\Delta n\left( {\Delta n + {N_D}} \right)}}{{{n_i}^2}}} \right)$

(1)

where Δn is the excess carrier density at one sun, k the Boltzmann constant, T the temperature, q the elementary charge, N_D the bulk doping density, and n_ithe intrinsic carrier density. The corresponding saturation current density for the back-surface-field region (J_ob’) was also extracted in the same measurement.

In order to investigate the performance of our rear side tunnel oxide passivated contact in a finished device, large area front junction n-type Si solar cells were fabricated on a ~ 4.5 Ωcm Cz wafers (Figure 2). The fabrication process involved saw damage removal in a heated KOH solution followed by alkaline texturing on both sides of the wafers. Next, a SiN_x mask on the front side was deposited, followed by a heated KOH treatment to planarize the back. After the planarization, the wafer thickness was reduced to about 175 µm. The boron ion implantation with proper dose and energy was performed on a production-line implanter at Suniva Inc. Then, a high temperature anneal (> 1000 °C) was used to restore the lattice [8] and eliminate the boron-rich layer formation [9]. The resulting sheet resistivity was ~ 110 Ω/□ for the boron emitter. Next, the tunnel oxide and n⁺ poly-Si layers were grown on the rear side according to the process described above. Then a thin Al₂O₃ was deposited by atomic layer deposition (ALD) and capped with PECVD SiN_x film for front surface passivation and anti-reflection coating. The Ag/Al grid was screen-printed on the front, followed by a high temperature firing (~ 730 °C) in an industrial-style belt furnace to achieve good ohmic contact. Finally, ~ 1 µm thick Ag film was deposited by thermal evaporation on the entire rear side.

3. Results and Discussion

In order to obtain an efficiently doped n⁺ Si layer to maintain the quasi-Femi level splitting in c-Si (high V_oc), a proper precursor PH₃/SiH₄ flow rate is required to deposit the doped a-Si layer. Figure 3 displays that as the PH₃/SiH₄ flow rate ratio (the doping level of as-deposited a-Si layer) decreases from 8.9% to 4.4%, the iV_oc dramatically increases from 678 to 728 mV, and the corresponding J_ob’ improves from 37.2 to 4.4 fA/cm². This is partly because less phosphorus dopant diffuses from the n⁺ Si layer through the tunnel oxide into the c-Si absorber, resulting in reduced Auger recombination. However, as the PH₃/SiH₄ flow rate ratio is further reduced from 4.4% to 1.1% (lower doping in the n⁺ poly-Si layer), the iV_oc declines sharply from 728 to 700 mV, probably due to the reduced doping results in weaker accumulation layer and reduced quasi-Fermi level splitting in the c-Si absorber. The resulting iV_oc of 728 mV and J_ob’ of 4.4 fA/cm² at the optimal PH₃/SiH₄ ratio of 4.4% indicate that our tunnel oxide passivated contact structure on Cz Si can provide excellent interface passivation quality for solar cell application, compared to the well-known Yablonovich’s semi-insulating polysilicon (SIPOS) solar cell with of J_ob’ of 10 fA/cm² [10] and Feldmann’s J_ob’ value of 8 fA/cm² for the TOPCON structure [3] on float-zone (Fz) Si.

After establishing the optimal PH₃/SiH₄ flow rate ratio of 4.4% in our PECVD reactor, we studied the influence of poly-Si anneal temperature T_anneal (650 °C ≤ T_anneal ≤ 950 °C) on the passivation quality. Figure 4 shows a plot of iV_ocand J_ob’ at 1 sun as a function of T_anneal. Figure 4 shows that the anneal temperature of 650 °C does not change the passivation quality, which remains quite poor (iV_oc = 645 mV) and similar to the as-deposited case. As T_anneal increases from 650 °C to 875 °C, the passivation quality improves dramatically with iV_oc achieving 728 mV. Correspondingly J_ob’ decreases from 141.5 to 4.4 fA/cm², suggesting that increasing T_anneal facilitates the solid-phase crystallization of the as-deposited n⁺ a-Si layer [11] and leads to further relaxation or defect healing in the tunnel oxide layer [12]. However, if T_anneal increases from 875 °C to 950 °C, a strong degradation in the interface passivation quality is observed, resulting in significant drop in iV_oc an d increase in J_ob’. This is partly due to increase dopant diffusion into Si which increases Auger recombination. This also can lead to local disruption of the tunnel oxide layer, since the gaseous-phase SiO can be produced in N₂ ambient according to the reaction SiO₂ + Si → 2 SiO. This can result in locally or partially unpassivated Si surface where epitaxial regrowth of the Si layer might happen [13]. Therefore, the role of tunnel oxide layer in our passivated contact structure was studied in the following section.

To investigate the quantitative impact of the tunnel oxide layer on the passivation quality of our structure, two symmetrical test structures were fabricated. One structure has tunnel oxide layer: Si(n⁺)/SiO_x/c-Si(n)/SiO_x/Si(n⁺) and another structure is without tunnel oxide layer: Si(n⁺)/c-Si(n)/Si(n⁺). This comparison was done with the optimal PH₃/SiH₄ ratio of 4.4% and the optimal T_anneal of 875 °C. Figure 5 shows the comparison of injection-dependent effective minority carrier lifetime curves for the two symmetrical test structures (with and without tunnel oxide). The injection level and iV_oc at one sun is also shown for the structures. Figure 5 clearly shows that the tunnel oxide layer is crucial for achieving very high quality passivation, since the iV_oc drops from 728 to 603 mV and J_ob’ increases from 4.4 to 1050 fA/cm² if tunnel oxide is removed. Hence, the tunnel oxide layer plays as a crucial role in our structure to allow efficient majority carrier (electron in our case) transport while block the minority carrier (hole in our case), because it presents a 4.5 eV barrier for holes to tunnel relative to 3.1 eV for electrons. In this study a symmetrical test structure capped with just the tunnel oxide (SiO_x/c-Si(n)/SiO_x) was also fabricated to evaluate the passivation quality of tunnel oxide by itself. The test structure gave a very low iV_oc of 653 mV and a high J_ob’ of 92 fA/cm², indicating that the back surface field (BSF) induced by fixed charge in the tunnel oxide layer does not provide sufficient surface passivation.

In order to quantify the impact of tunnel oxide on cell performance, solar cells were fabricated with ion-implanted homogeneous boron emitter on the front and passivated contact on the back with and without tunnel oxide (Figure 2). Table I lists the corresponding solar cell results, which was measured at AM 1.5G, 100 mW/cm², 25 °C, using the Fraunhofer ISE certificated 20.2% efficient large area n-type cell [14] as a reference. The highest V_oc of 683 mV was achieved with the tunnel oxide passivated structure, supporting excellent rear passivation quality. The cells also showed a high average short-circuit current density J_sc of 39.5 mA/cm² and average cell efficiency of 21.0%, with the highest of 21.2%. However, the cells without tunnel oxide layer showed very low V_oc of ~ 625 mV, and efficiency of less than 19%. This is mainly due to the extremely high J_ob’ of ~ 1050 fA/cm² that limits its V_oc to ≤625 mV, as also indicated by the simple one-diode model equation for Si solar cells:

${V_{oc}} = \frac{{nkT}}{q}{\rm{ln}}\left( {\frac{{{J_{sc}}}}{{{J_{0e}} + {J_{0b}}}} + 1} \right)$

(2)

where J_0e = J_{0e, pass} + J_{0e, metal}, and J_0b = J_{0b, bulk} + J_0b’. Note that J_{0e, pass} is emitter saturation current density of Al₂O₃/SiN_x passivated boron emitter, which was measured as ~ 24 fA/cm² using the QSSPC measurement on the unmetallized symmetrical emitter structure (SiN_x/Al₂O₃/p⁺/n/p⁺/Al₂O₃/SiN_x) [15]. J_{0e, metal} is the metal grid contribution to saturation current density, which was modeled at ~ 50 fA/cm² based on the Sentaurus simulation program [16,17]. J_{0b, bulk} is ~ 25 fA/cm² for 2 ms bulk lifetime base. Hence, the dominant recombination for the cells with tunnel oxide passivated contact is attributed to the front side, since J_0e (= J_{0e, pass} + J_{0e, metal} = 24 + 50 = 74 fA/cm²) >> J_0b’ (= 4.4 fA/cm²). Therefore, it can be concluded that the V_oc of the cells with tunnel oxide passivated contact can be improved further by introducing a selective emitter underneath the metal contact. In addition, the significantly lower internal quantum efficiency (IQE) in the long wavelength range of 900-1200 nm (see Figure 6) due to the high back surface recombination velocity for the cells without tunnel oxide layer also supports the resulting much lower V_oc and inferior J_sc, compared to the cells with tunnel oxide layer. Furthermore, very comparable internal reflection in the long wavelength range for both structures in Figure 6 indicates that there is negligible free carrier absorption in the tunnel oxide layer [18], which is desired for an excellent light trapping at rear side.

4. Conclusion

High-efficiency tunnel oxide passivated large area n-type front junction Si solar cells are presented. It has been shown that the passivation quality of our passivated contact scheme depends strongly on the precursor PH₃/SiH₄ flow rate ratio (hence the doping level of n⁺ Si layer) and the subsequent crystallization and dopant activation anneal temperature. Optimization of process parameters enabled an iV_oc of as high as 728 mV with the corresponding J_ob’ value of 4.4 fA/cm², suggesting an excellent interface passivation quality. Furthermore, an extremely high J_ob’ value of over 1000 fA/cm² for the structure solely passivated by the n⁺ poly-Si layer reveals that the tunnel oxide layer plays a critical role to provide carrier selectivity in our studied structure. The finished cells with tunnel oxide passivated rear contact showed average cell efficiency of over 21% after screen-printed metallization on a homogeneous ion-implanted boron emitter, demonstrating the promise of this technology option for industrial production of high-efficiency Si solar cells.

Acknowledgements

The authors would like to thank Tri Manh Nguyen and John Pham from IEN of Georgia Tech for their technical support, also thanks all other R&D group members of Suniva, Inc. and UCEP of Georgia Tech for their great contributions. This work was supported by the DOE FPACE II contract DE-EE0006336 and DOE Solarmat 2 contract DE-EE0006815.

Conflict of Interest

All authors declare no conflict of interest in this paper.